racket-unicorn
1 Constants
1.1 Architecture Types
UC_  ARCH_  ARM64
UC_  ARCH_  X86
UC_  ARCH_  RISCV
1.2 Mode Types
UC_  MODE_  ARM
UC_  MODE_  LITTLE_  ENDIAN
UC_  MODE_  64
UC_  MODE_  RISCV32
UC_  MODE_  RISCV64
1.3 Error Codes
UC_  ERR_  OK
1.4 Memory Permissions
UC_  PROT_  NONE
UC_  PROT_  READ
UC_  PROT_  WRITE
UC_  PROT_  EXEC
UC_  PROT_  ALL
1.5 ARM64 General Purpose Registers
UC_  ARM64_  REG_  INVALID
UC_  ARM64_  REG_  X0
UC_  ARM64_  REG_  X1
UC_  ARM64_  REG_  X2
UC_  ARM64_  REG_  X3
UC_  ARM64_  REG_  X4
UC_  ARM64_  REG_  X5
UC_  ARM64_  REG_  X6
UC_  ARM64_  REG_  X7
UC_  ARM64_  REG_  X8
UC_  ARM64_  REG_  X9
UC_  ARM64_  REG_  X10
UC_  ARM64_  REG_  X11
UC_  ARM64_  REG_  X12
UC_  ARM64_  REG_  X13
UC_  ARM64_  REG_  X14
UC_  ARM64_  REG_  X15
UC_  ARM64_  REG_  X16
UC_  ARM64_  REG_  X17
UC_  ARM64_  REG_  X18
UC_  ARM64_  REG_  X19
UC_  ARM64_  REG_  X20
UC_  ARM64_  REG_  X21
UC_  ARM64_  REG_  X22
UC_  ARM64_  REG_  X23
UC_  ARM64_  REG_  X24
UC_  ARM64_  REG_  X25
UC_  ARM64_  REG_  X26
UC_  ARM64_  REG_  X27
UC_  ARM64_  REG_  X28
UC_  ARM64_  REG_  X29
UC_  ARM64_  REG_  X30
UC_  ARM64_  REG_  SP
UC_  ARM64_  REG_  PC
1.6 ARM64 SIMD Registers
UC_  ARM64_  REG_  V0
UC_  ARM64_  REG_  V1
UC_  ARM64_  REG_  V2
UC_  ARM64_  REG_  V3
UC_  ARM64_  REG_  V4
UC_  ARM64_  REG_  V5
UC_  ARM64_  REG_  V6
UC_  ARM64_  REG_  V7
UC_  ARM64_  REG_  V8
UC_  ARM64_  REG_  V9
UC_  ARM64_  REG_  V10
UC_  ARM64_  REG_  V11
UC_  ARM64_  REG_  V12
UC_  ARM64_  REG_  V13
UC_  ARM64_  REG_  V14
UC_  ARM64_  REG_  V15
UC_  ARM64_  REG_  V16
UC_  ARM64_  REG_  V17
UC_  ARM64_  REG_  V18
UC_  ARM64_  REG_  V19
UC_  ARM64_  REG_  V20
UC_  ARM64_  REG_  V21
UC_  ARM64_  REG_  V22
UC_  ARM64_  REG_  V23
UC_  ARM64_  REG_  V24
UC_  ARM64_  REG_  V25
UC_  ARM64_  REG_  V26
UC_  ARM64_  REG_  V27
UC_  ARM64_  REG_  V28
UC_  ARM64_  REG_  V29
UC_  ARM64_  REG_  V30
UC_  ARM64_  REG_  V31
1.7 X86-64 Registers
UC_  X86_  REG_  INVALID
UC_  X86_  REG_  RAX
UC_  X86_  REG_  RBX
UC_  X86_  REG_  RCX
UC_  X86_  REG_  RDX
UC_  X86_  REG_  RSI
UC_  X86_  REG_  RDI
UC_  X86_  REG_  RSP
UC_  X86_  REG_  RBP
UC_  X86_  REG_  R8
UC_  X86_  REG_  R9
UC_  X86_  REG_  R10
UC_  X86_  REG_  R11
UC_  X86_  REG_  R12
UC_  X86_  REG_  R13
UC_  X86_  REG_  R14
UC_  X86_  REG_  R15
UC_  X86_  REG_  RIP
1.8 RISC-V General Purpose Registers
UC_  RISCV_  REG_  INVALID
UC_  RISCV_  REG_  X0
UC_  RISCV_  REG_  X1
UC_  RISCV_  REG_  X2
UC_  RISCV_  REG_  X3
UC_  RISCV_  REG_  X4
UC_  RISCV_  REG_  X5
UC_  RISCV_  REG_  X6
UC_  RISCV_  REG_  X7
UC_  RISCV_  REG_  X8
UC_  RISCV_  REG_  X9
UC_  RISCV_  REG_  X10
UC_  RISCV_  REG_  X11
UC_  RISCV_  REG_  X12
UC_  RISCV_  REG_  X13
UC_  RISCV_  REG_  X14
UC_  RISCV_  REG_  X15
UC_  RISCV_  REG_  X16
UC_  RISCV_  REG_  X17
UC_  RISCV_  REG_  X18
UC_  RISCV_  REG_  X19
UC_  RISCV_  REG_  X20
UC_  RISCV_  REG_  X21
UC_  RISCV_  REG_  X22
UC_  RISCV_  REG_  X23
UC_  RISCV_  REG_  X24
UC_  RISCV_  REG_  X25
UC_  RISCV_  REG_  X26
UC_  RISCV_  REG_  X27
UC_  RISCV_  REG_  X28
UC_  RISCV_  REG_  X29
UC_  RISCV_  REG_  X30
UC_  RISCV_  REG_  X31
1.9 RISC-V Floating-Point Registers
UC_  RISCV_  REG_  F0
UC_  RISCV_  REG_  F1
UC_  RISCV_  REG_  F2
UC_  RISCV_  REG_  F3
UC_  RISCV_  REG_  F4
UC_  RISCV_  REG_  F5
UC_  RISCV_  REG_  F6
UC_  RISCV_  REG_  F7
UC_  RISCV_  REG_  F8
UC_  RISCV_  REG_  F9
UC_  RISCV_  REG_  F10
UC_  RISCV_  REG_  F11
UC_  RISCV_  REG_  F12
UC_  RISCV_  REG_  F13
UC_  RISCV_  REG_  F14
UC_  RISCV_  REG_  F15
UC_  RISCV_  REG_  F16
UC_  RISCV_  REG_  F17
UC_  RISCV_  REG_  F18
UC_  RISCV_  REG_  F19
UC_  RISCV_  REG_  F20
UC_  RISCV_  REG_  F21
UC_  RISCV_  REG_  F22
UC_  RISCV_  REG_  F23
UC_  RISCV_  REG_  F24
UC_  RISCV_  REG_  F25
UC_  RISCV_  REG_  F26
UC_  RISCV_  REG_  F27
UC_  RISCV_  REG_  F28
UC_  RISCV_  REG_  F29
UC_  RISCV_  REG_  F30
UC_  RISCV_  REG_  F31
UC_  RISCV_  REG_  PC
1.10 RISC-V ABI Name Aliases (GP Registers)
UC_  RISCV_  REG_  ZERO
UC_  RISCV_  REG_  RA
UC_  RISCV_  REG_  SP
UC_  RISCV_  REG_  GP
UC_  RISCV_  REG_  TP
UC_  RISCV_  REG_  T0
UC_  RISCV_  REG_  T1
UC_  RISCV_  REG_  T2
UC_  RISCV_  REG_  S0
UC_  RISCV_  REG_  FP
UC_  RISCV_  REG_  S1
UC_  RISCV_  REG_  A0
UC_  RISCV_  REG_  A1
UC_  RISCV_  REG_  A2
UC_  RISCV_  REG_  A3
UC_  RISCV_  REG_  A4
UC_  RISCV_  REG_  A5
UC_  RISCV_  REG_  A6
UC_  RISCV_  REG_  A7
UC_  RISCV_  REG_  S2
UC_  RISCV_  REG_  S3
UC_  RISCV_  REG_  S4
UC_  RISCV_  REG_  S5
UC_  RISCV_  REG_  S6
UC_  RISCV_  REG_  S7
UC_  RISCV_  REG_  S8
UC_  RISCV_  REG_  S9
UC_  RISCV_  REG_  S10
UC_  RISCV_  REG_  S11
UC_  RISCV_  REG_  T3
UC_  RISCV_  REG_  T4
UC_  RISCV_  REG_  T5
UC_  RISCV_  REG_  T6
1.11 RISC-V ABI Name Aliases (FP Registers)
UC_  RISCV_  REG_  FT0
UC_  RISCV_  REG_  FT1
UC_  RISCV_  REG_  FT2
UC_  RISCV_  REG_  FT3
UC_  RISCV_  REG_  FT4
UC_  RISCV_  REG_  FT5
UC_  RISCV_  REG_  FT6
UC_  RISCV_  REG_  FT7
UC_  RISCV_  REG_  FS0
UC_  RISCV_  REG_  FS1
UC_  RISCV_  REG_  FA0
UC_  RISCV_  REG_  FA1
UC_  RISCV_  REG_  FA2
UC_  RISCV_  REG_  FA3
UC_  RISCV_  REG_  FA4
UC_  RISCV_  REG_  FA5
UC_  RISCV_  REG_  FA6
UC_  RISCV_  REG_  FA7
UC_  RISCV_  REG_  FS2
UC_  RISCV_  REG_  FS3
UC_  RISCV_  REG_  FS4
UC_  RISCV_  REG_  FS5
UC_  RISCV_  REG_  FS6
UC_  RISCV_  REG_  FS7
UC_  RISCV_  REG_  FS8
UC_  RISCV_  REG_  FS9
UC_  RISCV_  REG_  FS10
UC_  RISCV_  REG_  FS11
UC_  RISCV_  REG_  FT8
UC_  RISCV_  REG_  FT9
UC_  RISCV_  REG_  FT10
UC_  RISCV_  REG_  FT11
2 Core API
uc-open
uc-close
uc-mem-map
uc-mem-write
uc-mem-read
uc-reg-write
uc-reg-read
uc-emu-start
uc-strerror
3 Helper Functions
uc-create-arm64
uc-create-x64
uc-create-riscv32
uc-create-riscv64
uc-reg-write-u64
uc-reg-write-s64
uc-reg-read-u64
uc-reg-write-u32
uc-reg-read-u32
uc-reg-write-u128
uc-reg-read-u128
uc-map-memory
uc-write-code
uc-emulate
9.1

racket-unicorn🔗ℹ

dannypsnl

 (require racket-unicorn) package: racket-unicorn

Racket FFI bindings for the Unicorn CPU emulator.

1 Constants🔗ℹ

1.1 Architecture Types🔗ℹ

ARM64 architecture.
X86 architecture.
RISC-V architecture.

1.2 Mode Types🔗ℹ

ARM mode.
Little-endian mode.
64-bit mode (for x86).
32-bit RISC-V mode.
64-bit RISC-V mode.

1.3 Error Codes🔗ℹ

No error (success).

1.4 Memory Permissions🔗ℹ

No permissions.
Read permission.
Write permission.
Execute permission.
All permissions (read, write, execute).

1.5 ARM64 General Purpose Registers🔗ℹ

Invalid register.

ARM64 general purpose registers X0 through X28.

Frame pointer (FP) register.
Link register (LR).
Stack pointer register.
Program counter register.

1.6 ARM64 SIMD Registers🔗ℹ

ARM64 NEON/SIMD 128-bit registers V0 through V31.

1.7 X86-64 Registers🔗ℹ

Invalid register.

X86-64 general purpose and instruction pointer registers.

1.8 RISC-V General Purpose Registers🔗ℹ

Invalid register.

RISC-V general purpose registers X0 through X31.

1.9 RISC-V Floating-Point Registers🔗ℹ

RISC-V floating-point registers F0 through F31.

RISC-V program counter register.

1.10 RISC-V ABI Name Aliases (GP Registers)🔗ℹ

RISC-V ABI name aliases for general purpose registers. UC_RISCV_REG_ZERO is the hard-wired zero register, UC_RISCV_REG_RA is the return address, UC_RISCV_REG_SP is the stack pointer, UC_RISCV_REG_GP is the global pointer, UC_RISCV_REG_TP is the thread pointer, UC_RISCV_REG_S0/UC_RISCV_REG_FP is the frame pointer, UC_RISCV_REG_A0 through UC_RISCV_REG_A7 are argument registers, UC_RISCV_REG_S0 through UC_RISCV_REG_S11 are saved registers, and UC_RISCV_REG_T0 through UC_RISCV_REG_T6 are temporary registers.

1.11 RISC-V ABI Name Aliases (FP Registers)🔗ℹ

RISC-V ABI name aliases for floating-point registers. UC_RISCV_REG_FA0 through UC_RISCV_REG_FA7 are floating-point argument registers, UC_RISCV_REG_FS0 through UC_RISCV_REG_FS11 are saved floating-point registers, and UC_RISCV_REG_FT0 through UC_RISCV_REG_FT11 are temporary floating-point registers.

2 Core API🔗ℹ

procedure

(uc-open arch mode)  
exact-integer? cpointer?
  arch : exact-integer?
  mode : exact-integer?
Creates a new Unicorn emulator instance for the given arch and mode. Returns two values: an error code and a pointer to the engine. Use UC_ERR_OK to check for success.

procedure

(uc-close uc)  exact-integer?

  uc : cpointer?
Closes and frees an emulator instance. Returns an error code.

procedure

(uc-mem-map uc address size perms)  exact-integer?

  uc : cpointer?
  address : exact-nonnegative-integer?
  size : exact-nonnegative-integer?
  perms : exact-nonnegative-integer?
Maps a memory region at address with the given size and perms. Returns an error code.

procedure

(uc-mem-write uc address bytes size)  exact-integer?

  uc : cpointer?
  address : exact-nonnegative-integer?
  bytes : bytes?
  size : exact-nonnegative-integer?
Writes bytes to the emulator’s memory at address. Returns an error code.

procedure

(uc-mem-read uc address bytes size)  exact-integer?

  uc : cpointer?
  address : exact-nonnegative-integer?
  bytes : bytes?
  size : exact-nonnegative-integer?
Reads from the emulator’s memory at address into bytes. Returns an error code.

procedure

(uc-reg-write uc regid value)  exact-integer?

  uc : cpointer?
  regid : exact-integer?
  value : cpointer?
Writes a value to a register identified by regid. The value must be a pointer to the data to write. Returns an error code.

procedure

(uc-reg-read uc regid value)  exact-integer?

  uc : cpointer?
  regid : exact-integer?
  value : cpointer?
Reads a value from a register identified by regid into value. Returns an error code.

procedure

(uc-emu-start uc begin until timeout count)  exact-integer?

  uc : cpointer?
  begin : exact-nonnegative-integer?
  until : exact-nonnegative-integer?
  timeout : exact-nonnegative-integer?
  count : exact-nonnegative-integer?
Starts emulation from begin address until until address. timeout specifies duration in microseconds (0 for no limit). count specifies the number of instructions to emulate (0 for no limit). Returns an error code.

procedure

(uc-strerror code)  string?

  code : exact-integer?
Returns a human-readable error message for the given error code.

3 Helper Functions🔗ℹ

procedure

(uc-create-arm64)  cpointer?

Creates a new ARM64 emulator instance. Raises an error on failure.

procedure

(uc-create-x64)  cpointer?

Creates a new x86-64 emulator instance. Raises an error on failure.

procedure

(uc-create-riscv32)  cpointer?

Creates a new RISC-V 32-bit emulator instance. Raises an error on failure.

procedure

(uc-create-riscv64)  cpointer?

Creates a new RISC-V 64-bit emulator instance. Raises an error on failure.

procedure

(uc-reg-write-u64 uc regid value)  void?

  uc : cpointer?
  regid : exact-integer?
  value : exact-nonnegative-integer?
Writes an unsigned 64-bit value to a register. Raises an error on failure.

procedure

(uc-reg-write-s64 uc regid value)  void?

  uc : cpointer?
  regid : exact-integer?
  value : exact-integer?
Writes a signed 64-bit value to a register. Raises an error on failure.

procedure

(uc-reg-read-u64 uc regid)  exact-nonnegative-integer?

  uc : cpointer?
  regid : exact-integer?
Reads an unsigned 64-bit value from a register. Raises an error on failure.

procedure

(uc-reg-write-u32 uc regid value)  void?

  uc : cpointer?
  regid : exact-integer?
  value : exact-nonnegative-integer?
Writes an unsigned 32-bit value to a register. Raises an error on failure.

procedure

(uc-reg-read-u32 uc regid)  exact-nonnegative-integer?

  uc : cpointer?
  regid : exact-integer?
Reads an unsigned 32-bit value from a register. Raises an error on failure.

procedure

(uc-reg-write-u128 uc regid bytes)  void?

  uc : cpointer?
  regid : exact-integer?
  bytes : bytes?
Writes a 128-bit value to a SIMD register (e.g., V0-V31). bytes must be exactly 16 bytes long. Raises an error on failure.

procedure

(uc-reg-read-u128 uc regid)  bytes?

  uc : cpointer?
  regid : exact-integer?
Reads a 128-bit value from a SIMD register. Returns a 16-byte bytes value. Raises an error on failure.

procedure

(uc-map-memory uc address size)  void?

  uc : cpointer?
  address : exact-nonnegative-integer?
  size : exact-nonnegative-integer?
Maps a memory region with read-write-execute permissions (UC_PROT_ALL). Raises an error on failure.

procedure

(uc-write-code uc address code-bytes)  void?

  uc : cpointer?
  address : exact-nonnegative-integer?
  code-bytes : bytes?
Writes machine code code-bytes to memory at address. Raises an error on failure.

procedure

(uc-emulate uc start-addr end-addr)  void?

  uc : cpointer?
  start-addr : exact-nonnegative-integer?
  end-addr : exact-nonnegative-integer?
Emulates code from start-addr to end-addr with no timeout and no instruction count limit. Raises an error on failure.